1. Field of Invention
Embodiments of the invention relate in general to a data transfer protocol. More specifically, the embodiments of the invention relate to methods and systems of communicating data in a communication channel.
2. Description of the Background Art
High-speed serial link interfaces such as Serializer/Deserializer (SERDES) transmit data at rates of 6.25 gigabits per second (Gbps) for applications requiring very high rates of data transfer. The transfer of data is in the form of bit packets. However, the signal integrity over these high-speed communication links is affected by challenges such as signal attenuation from backplane materials, added noise due to crosstalk, multiple reflections, and Inter Symbol Interferences. High-speed serial interfaces such as SERDES use Decision Feedback Equalizer (DFE) at the receiver end, to maintain signal integrity and equalization over a communication channel. DFE circuits also reduce bit error rates.
However, certain recurring patterns result in the DFE losing equalization of signals, thereby increasing the bit error rate. The bit error rate quantifies the number of errors in bit transmission over a period of time. Recurring patterns may be a long sequence of 0's or 1's an idle pattern, or intra-packet null patterns. According to a conventional technique, this problem is overcome by ‘bit-stuffing’. In this technique, the transmitter inserts a bit of the opposite polarity to the polarity of the recurring bit. The introduction of a bit of the opposite polarity breaks the continuous pattern. The receiver recognizes the bit pattern and removes the bit of the opposite polarity, knowing that it is not a part of the real data.
However, bit stuffing may not be very effective for multi-bit repetitive patterns in DFE. This poses challenges to signal integrity. Moreover, multi-bit repetitive patterns result in the loss of DFE equalization and the increase of bit error rate.